HCW 2024 Call for Papers

Heterogeneity in Computing Workshop

May 27, 2024
San Francisco, CA, USA

In conjunction with the 38th IEEE International Parallel and Distributed Processing Symposium (IPDPS 2024)

Sponsored by the IEEE Computer Society
through the Technical Committee on Parallel Processing (TCPP)

Most modern computing systems are heterogeneous, either for organic reasons because components grew independently, as it is the case in desktop grids, or by design to leverage the strength of specific hardware, as it is the case in accelerated systems. In any case, all computing systems have some form of hardware or software heterogeneity that must be managed, leveraged, understood, and exploited. The Heterogeneity in Computing Workshop (HCW) is a venue to discuss and innovate in all theoretical and practical aspects of heterogeneous computing: design, programmability, efficient utilization, algorithms, modeling, applications, etc. HCW 2024 will be the thirty-third annual gathering of this workshop.


Topics of interest include but are not limited to the following areas:

Heterogeneous multicore systems and architectures: Design, exploration, and experimental analysis of heterogeneous computing systems such as Graphics Processing Units, heterogeneous systems-on-chip, Artificial Intelligence chips, Field Programmable Gate Arrays, big.LITTLE, and application-specific architectures.

Heterogeneous parallel and distributed systems: Design and analysis of computing grids, cloud systems, hybrid clusters, datacenters, geo-distributed computing systems, and supercomputers.

Deep memory hierarchies: Design and analysis of memory hierarchies with SRAM, DRAM, Flash/SSD, and HDD technologies; NUMA architectures; cache coherence strategies; novel memory systems such as phase-change RAM, magnetic (e.g., STT) RAM, 3D Xpoint/crossbars, and memristors.

On-chip, off-chip, and heterogeneous network architectures: Network-on-chip (NoC) architectures and protocols for heterogeneous multicore applications; energy, latency, reliability, and security optimizations for NoCs; off-chip (chip-to-chip) network architectures and optimizations; heterogeneous networks (combination of NoC and off-chip) design, evaluation, and optimizations; large-scale parallel and distributed heterogeneous network design, evaluation, and optimizations.

Programming models and tools: Programming paradigms and tools for heterogeneous systems; middleware and runtime systems; performance-abstraction tradeoff; interoperability of heterogeneous software environments; workflows; dataflows.

Resource management and algorithms for heterogeneous systems: Parallel algorithms for solving problems on heterogeneous systems (e.g., multicores, hybrid clusters, grids, or clouds); strategies for scheduling and allocation on heterogeneous 2D and 3D multicore architectures; static and dynamic scheduling and resource management for large-scale and parallel heterogeneous systems.

Modeling, characterization, and optimizations: Performance models and their use in the design of parallel and distributed algorithms for heterogeneous platforms; characterizations and optimizations for improving the time to solve a problem (e.g., throughput, latency, runtime); modeling and optimizing electricity consumption (e.g., power, energy); modeling for failure management (e.g., fault tolerance, recovery, reliability); modeling for security in heterogeneous platforms.

Applications on heterogeneous systems: Case studies; confluence of Big Data systems and heterogeneous systems; data-intensive computing; scientific computing.

This year we wish to focus on and expand submissions and presentations in the following “hot topics” areas; therefore, we especially invite submissions in the following three areas:

Heterogeneous Integration of Quantum Computing: Design, exploration, and analysis of architectures and software frameworks enabling heterogeneous integration of classical computing and quantum computing (e.g., heterogeneous quantum computers, error correction, heterogeneous applications that use both classical and quantum logic, benchmarks for heterogeneous quantum computers).

Heterogeneity and Interoperability in Software & Data Systems: Design, exploration, and analysis of architectures and software frameworks for interoperability in software and data systems (e.g., semantic frameworks, interoperability for heterogeneous Internet-of-Things systems, model-driven frameworks).

Heterogeneous Computing for Machine Learning (ML) and Deep Learning (DL): Design, exploration, benchmarking, and analysis of accelerators and software frameworks for ML and DL applications on heterogeneous computing systems.

Important Dates

  • Paper submission: February 19, 2024
  • Author notification: February 29, 2024
  • Camera-ready submission: March 6, 2024

Paper Submissions

Manuscripts submitted to HCW 2024 should not have been previously published or be under review for a different workshop, conference, or journal.

Submissions must use the latest IEEE manuscript templates for conference proceedings. Submissions may not exceed a total of ten single-spaced double-column pages using 10-point size font on 8.5x11 inch pages. The page limit includes figures, tables, and references. A single-blind review process will be followed.

Files should be submitted by following the instructions at the IPDPS 2024 submission site.

Workshop Organization

General Co-Chairs: Anne C. Elster and Jan Christian Meyer, Norwegian University of Science and Technology, Norway

Technical Program Committee Co-Chairs: DK Panda and Hari Subramoni, The Ohio State University, USA

Questions may be sent to the HCW 2024 General Co-Chairs (Anne Elster: elster at ntnu dot no, Jan Christian Meyer: jan dot christian dot meyer at ntnu dot no) or Technical Program Committee Co-Chairs (DK Panda: panda.2 at osu dot edu, Hari Subramoni: subramoni.1 at osu dot edu).

Technical Program Committee

(Partial list, last updated Jan 9, 2024)
Shashank Adavally, Micron Technology, USA
Gonzalo Brito Gadeschi, NVIDIA Corporation, Germany
Nick Brown, Edinburgh Parallel Computing Centre, University of Edinburgh, UK
Daniel Cordeiro, University of São Paulo, Brazil
Mattan Erez, University of Texas, USA
Richard Graham, NVIDIA Corporation, USA
Yanfei Guo, Argonne National Laboratory, USA
Diana Göhringer, Technical University Dresden, Germany
H. Peter Hofstee, IBM, USA
Tanzima Islam, Texas State University, USA
Emmanuel Jeannot, INRIA/University of Bordeaux, France
Joanna Kolodziej, Cracow University of Technology/NASK National Research Institute, Poland
Hatem Ltaief, King Abdullah University of Science and Technology, Saudi Arabia
Pankaj Mehra, Elephance Memory, Inc./University of California at Santa Cruz, USA
Raymond Namyst, INRIA/University of Bordeaux, France
William Schonbein, Sandia National Laboratories, USA
Marko Scrbak, AMD, USA
Aamir Shafi, The Ohio State University, USA
Sameer Shende, University of Oregon, USA
Devesh Tiwari, Northeastern University, USA

Steering Committee

Kamesh Madduri, Pennsylvania State University, USA (Co-Chair)
Behrooz Shirazi, National Science Foundation, USA (Co-Chair)
H. J. Siegel, Colorado State University, USA (Past Chair)
John Antonio, University of Oklahoma, USA
David Bader, New Jersey Institute of Technology, USA
Anne Benoit, École Normale Supérieure de Lyon, France
Jack Dongarra, University of Tennessee, USA
Alexey Lastovetsky, University College Dublin, UK
Sudeep Pasricha, Colorado State University, USA
Viktor K. Prasanna, University of Southern California, USA
Yves Robert, École Normale Supérieure de Lyon, France
Erik Saule, University of North Carolina at Charlotte, USA
Uwe Schwiegelshohn, TU Dortmund University, Germany

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